Computer Architecture - Winter 2020

Course Information:

• Course Outline
• Course Syllabus
• D2L
• Textbook Web Site
• Homework Standards
• Custom CPU
• Early Memory Unit

Exams:

Exam #1 Thursday, 2/6:   Review Sheet   Previous Exam

Exam #2 Tuesday, 3/17 2-4pm:   Cancelled

Final Project Presentations:

Thursday, March 5

• Super NES Architecture - Konrad McClure
• Playstation 3's Cell Engine - Kyle Malaguit
• Nature Inspired Architectures - Kaden Sukachevin
• Apple A-Series Processors - Andrew Nascimento
• Custom Assembler Design - Caleb Jurgensen

Monday, March 9

• ATtiny – Lite Custom Processor Design - Greg Birge
• Aegis Processor Architecture - Gary Jessup
• Sinclair ZX Spectrum Computer - Mason Wilde
• Hardware Accelerators - Jaymes Sullivan
• Exynos Processor - Khalil Llewellyn

Tuesday, March 10

• SRAM Memory - Travis Stanger
• Drive Technologies - Andrew Binder
• History of DDR SDRAM - Dominick Christensen
• Development of Non-volatile Memory - Caleb Froelich
• Overview of RAID Technology - Caleb Herbel

Wednesday, March 11

• Quantum Computing I - Daniel Arlt
• Auantum Computing II - Chrisner Garcesa
• SIRI Architecture - Elizabeth Ventura
• GPU Architecture I - Jeffrey Grange
• GPU Architecture II - Lucas Saca

Thursday, March 12

• Cloud Computing - Tanek Russell
• WEB GUI Software Architecture - Lucas Marcondes
• Quantum Machine Learning - Russell Palma
• Custom Booth Processor - Phong Pham and Christian Terrado

Project:

• Project and Presentation List
• Project Definition
• Rough Draft Assignment (Due Noon Friday, 3/6)
• Sample Report
• Project Update Form #1 (docx) (Due Thursday, 2/20)
• Project Update Form #2 (docx) (Due Thursday, 2/27)
• Project Committal Form (docx)(Due Wednesday, 2/12)

Lecture:

• Course Introduction
• Chapter 1 - Computer Performance
• Chapter 2 - MIPS Architecture and R-type Instructions
• Chapter 2 - MIPS I-type Instructions
• Chapter 2 - MIPS Program Flow Instructions
• Chapter 2 - QTSpim Simulator
• Chapter 2 - Other Instruction Sets
• Chapter 3 - Arithmetic for Computers - Introduction
• Chapter 3 - Integer Math
• Chapter 3 - Floating Point Math
• Chapter 3 - ALU Design
• Chapter 4 - The Processor - Single Cycle Datapath
• Chapter 4 - The Processor - Pipelining
• Chapter 4 - The Processor - Data Hazards
• Chapter 4 - The Processor - Control Hazards
  • Branch Prediction
  • Perceptron-Based Branch Prediction
• Chapter 4 - Controller Design
• Chapter 4 - Advanced Material
• Chapter 5 - Memory Basics
• Chapter 5 - Direct-Mapped Caches
• Chapter 5 - Set Associative Caches
• Chapter 5 - Virtual Memory
• Hyper-, Multi-, and Simultaneous Threading
• Thesis Defense - Technology Mapping of Timed Asynchronous Circuits

Homework:

• #1:    Chapter 1 - Evaluating Computer Performance (Due Thursday, 1/9)
• #2:    Chapter 2 - MIPS Instruction Set (Due Wednesday, 1/15)
• #3:    Chapter 2 - MIPS Programming (Due Monday, 1/20)
• #4:    Chapter 3 - Computer Arithmetic Presentations (Due 9am Monday 1/20 or Tuesday, 1/21)
• #5:    Chapter 3 - Computer Arithmetic (Due Monday, 1/27)
• #6:    Chapter 4 - Datapath Analysis (Due Thursday, 1/30)
• #7:    Chapter 4 - Data Hazards and Branch Prediction (Due Thursday, 2/6)
• #8:    Chapter 4 - Processor Presentations (Due 9am Monday 2/10 or Tuesday, 2/11))
• #9:    Chapter 5 - Cache Memory Systems (Due Wednesday, 2/26)

Chapter History Presentations:

• Overview
• Chapter 1 - History of Computing 1, Caleb and Travis
• Chapter 1 - History of Computing 2, Dominick and Phong
• Chapter 2 - History of Languages, Kaden and Lucas
• Chapter 2 - History of Instruction Sets, Kyle and Lucas
• Chapter 3 - History of Arithmetic 1, Christian and Greg
• Chapter 3 - History of Arithmetic 2, Caleb and Mason
• Chapter 4 - History of the Processor 1, Caleb and Gary
• Chapter 4 - History of the Processor 2, Andrew, Chrisner, and Khalil
• Chapter 5 - History of Memory 1, Elizabeth and TaNek
• Chapter 5 - History of Memory 2, Jeff and Konrad
• Future of Computing 1, Andrew and Daniel
• Future of Computing 2, Jaymes and Russell

Textbook:

Historical Perspectives and Further Reading:   Chapter 1   Chapter 2   Chapter 3   Chapter 4   Chapter 5   Chapter 6

Advanced Material:

• Chapter 2 - Compiling C and Interpreting Java
• Chapter 4 - HDL Design of a Pipelined Processor
• Chapter 5 - Implementing Cache Controllers
• Chapter 6 - Networks

Appendices:

• Appendix B1 - ARM and Thumb Assembler Instructions
• Appendix B2 - ARM and Thumb Instruction Encodings
• Appendix B3 - ARM Instruction Cycle Timings
• Appendix D - Mapping Control to Hardware
• Appendix E - A Survey of RISC Architectures
• Appendix C - Graphics and Computing GPUs

Miscellaneous:

• Further Reading - Lists of recommended reading for further study, organized by chapter
• Glossary - Glossary of all terms introduced in the book
• Index
• Textbook Errata as of Sept, 2014

Tools:

Mips:   Overview (Wikipedia)   Company Web Page   Instruction Set   Quick Reference   Reference Data   Online Tutorial   ASCII Table

QTSpim Simulator:   Download   Quick Reference   Youtube Tutorial   Examples (zip file)

MARS Simulator:   Download   Tutorial Materials   Features

Booth's Multiplication Algorithm:   Wikipedia   Radix-4   Examples   JavaScript Simulator

Professional Sources:

Magazines:   Electronic Engineering Times   IEEE Computer Architecture   IEEE Spectrum

Web Pages:   RISC-V   International Technology Roadmap for Semiconductors

Processor Companies (just to list a few):   Mips   Intel   ARM   Sun (Oracle)   AMD